Coax Fed Patch Antenna Design in ADS

Hello Readers,

I created a simple to understand video on how to setup and simulate Coax Fed Patch Antenna in Keysight ADS. Have a look at video below:

Happy Designing…!!!


High Speed Signal Integrity Seminar and Hands-On Workshop

It is my pleasure to invite you to join us for the complimentary High Speed Signal Integrity Seminar and Hands-On workshop scheduled at Chennai, India on 21st Feb 2018 at Residency Towers, T Nagar.

Download the below e-invite for more information on agenda and registration details.

Happy Designing…..!!!

e-Invite: HSD_Workshop_Chennai

Practical Modeling of High Speed Channels Based on Datasheet Input

As Dave Dunham from Molex Corp. likes to say “When designing high speed serial links beyond 10 GB/s, everything matters“.  Part of that everything is accurate modeling of transmission line losses. It is important to model dielectric and conductor loss accurately.

Here is a very useful presentation with speaker notes on the topic of “Practical Modeling of High Speed Channels Based on Datasheet Input” presented by Bert Simonovich, Lamsim Enterprise Inc at EDICON 2017.

Here is the motivation of the methodology proposed:

As my friend Eric Bogatin often likes to say, Sometimes an OK answer NOW! is better than a good answer late.” As a high-speed signal integrity practitioner and backplane architect, I often have to come up with an answer sooner, rather than later because of the impact to time and cost to my clients. And that’s why I have been motivated over the last few years to research and develop a simple methodology to accurately determine parameters to feed into modern EDA tools .

Happy Designing…..!!!

Anurag Bhargava



Keysight EEsof India Design Forum 2017

It is my pleasure to invite you to attend Keysight EEsof India Design Forum 2017 to be held at Hyderabad, Bangalore and Ahmedabad on 24th Oct, 26th Oct and 28th Oct 2017 respectively.

Seminar is complimentary but early registration is advised to secure your participation.

You can register for the location of your choice: Register Now

Download the detailed e-invite from here: Design Forum 2017 e-invite

Hope to see you at one of the locations….



Workshop on High Speed Signal Integrity

I would be conducting a day-long, hands-on workshop on High Speed Signal Integrity design at Keysight Technologies, Bangalore office. First session is scheduled on 17th August 2017.

This workshop is complimentary but requires prior registration to receive a formal invite.

Workshop Agenda:

Pre Layout SI

  • Designing VIAs for optimum High Speed performance
  • Controlled Impedance Line Design
  • Channel Simulation Basics
  • High Speed Serial Link Simulation
  • Batch Simulation
  • IBIS-AMI Simulation
  • Eye Optimization

Post Layout SI

  • BRD/ODB++ Layout Import in ADS
  • Post Layout SI Simulation with SIPro
  • Channel Simulation with Post Layout Data

If you are interested to attend the same, you can drop a mail with your complete contact details at “” or leave your details in the comment box….

Happy Designing…!!!

P.S. If we are not able to accommodate you for the 1st session due to capacity limit or you are not able to make it due to other engagements then we will surely accommodate you in one the future  sessions which are likely to happen shortly.