As Dave Dunham from Molex Corp. likes to say “When designing high speed serial links beyond 10 GB/s, everything matters“. Part of that everything is accurate modeling of transmission line losses. It is important to model dielectric and conductor loss accurately.
Here is a very useful presentation with speaker notes on the topic of “Practical Modeling of High Speed Channels Based on Datasheet Input” presented by Bert Simonovich, Lamsim Enterprise Inc at EDICON 2017.
Here is the motivation of the methodology proposed:
As my friend Eric Bogatin often likes to say, “Sometimes an OK answer NOW! is better than a good answer late.” As a high-speed signal integrity practitioner and backplane architect, I often have to come up with an answer sooner, rather than later because of the impact to time and cost to my clients. And that’s why I have been motivated over the last few years to research and develop a simple methodology to accurately determine parameters to feed into modern EDA tools .
I would be conducting a day-long, hands-on workshop on High Speed Signal Integrity design at Keysight Technologies, Bangalore office. First session is scheduled on 17th August 2017.
This workshop is complimentary but requires prior registration to receive a formal invite.
Pre Layout SI
- Designing VIAs for optimum High Speed performance
- Controlled Impedance Line Design
- Channel Simulation Basics
- High Speed Serial Link Simulation
- Batch Simulation
- IBIS-AMI Simulation
- Eye Optimization
Post Layout SI
- BRD/ODB++ Layout Import in ADS
- Post Layout SI Simulation with SIPro
- Channel Simulation with Post Layout Data
If you are interested to attend the same, you can drop a mail with your complete contact details at “firstname.lastname@example.org” or leave your details in the comment box….
P.S. If we are not able to accommodate you for the 1st session due to capacity limit or you are not able to make it due to other engagements then we will surely accommodate you in one the future sessions which are likely to happen shortly.
Keysight Technologies has scheduled a free 1-hour webcast on Thermal Analysis of the PCB and its impact on Power Integrity performance.
WHY THIS WEBCAST IS IMPORTANT
Did you know that in addition to validating the electrical performance of the power integrity on your PCB, it is also crucial to perform a thermal validation as well? This webcast introduces the thermal aspects of power integrity in your PCB designs and why it is critical to consider them. To better understand a design’s power integrity from the thermal viewpoint, it provides a theoretical background for heat transfer and overview of the thermal analysis technologies. Finally, the webcast demonstrates the importance of performing thermal analysis on PCB designs by showing a practical PCB design example.
Date: 27th July 2017
Time: 01.00pm Eastern Daylight Time (10.30pm India Time)
I created a simple tutorial on how to import ODB++ file from a 3rd party layout tool into ADS for simulation with SIPro for signal integrity applications.
Don’t forget to leave your useful comments after watching the video….
Keysight Technologies & Granite River Labs (GRL) are pleased to invite you to participate at the “USB & Thunderbolt Technology Conclave”, a complimentary seminar focusing on High Speed Digital Technology, primarily USB & Thunderbolt.
Date: 20th July 2017
Location: Hotel Park Plaza, Marathahalli, Outer Ring Road, Bangalore
Who Should Attend:
Engineers, Designers, Managers, Architects who are working on High Speed Digital Designs.
Seating is limited and early registration is advised…..!!!