The Internet of Things (IoT) fulfills a promise of a more efficient and connected world. But with dozens of devices per household, battery management must become wireless and autonomous. This problem is now being solved through power harvesting, which enables a circuit to power itself from energy in the environment.
- Design a circuit to harvest enough power for IoT devices of the future and verify simulation results before committing to fabrication
- Explored the design space for optimum configuration using Keysight ADS Software
- Transformed the voltage to overcome the Schottky diode junction voltage using a high Q quartz crystal resonator
- Doubled the usable power
- Improved conversion efficiency from < 10 to 22.6%
- Verified a close match between simulation and measurement data
Click here power-harvesting-circuit for the case study and click here to read the complete article: “RF Energy Harvesting Design Using High Q Resonators“
A new video describing the design, simulation and test of a 7W X-band GaN MMIC PA has just been uploaded to the Plextex RFI You Tube channel.
The MMIC PA used a GaN process from the UMS foundry and Keysight’s ADS CAD tool as the simulator. Load Pull and EM (Momentum) simulations are utilized. A comparison of measured results to simulated is also included.
Thanks to the Plextex RFI team for creating such a insightful video to help new and experienced MMIC designers.
Click here to view the video: https://youtu.be/-iRnDxCSUNI
WHAT IS THE WEBCAST ABOUT
100Gbit Ethernet can be a significant design hurdle with 4 lanes running at 25Gbit/s across electrical interconnects and backplanes. Moving from 10G and 40G to 100G represents a step-change in design barriers, especially for signal integrity.
How does the design engineer know that an optimization made in channel simulation, will translate into an optimal design on the bench? By adhering to a measurement-to-simulation validation methodology, and building confidence in both sim models and test results.
In this webcast, Xilinx application specialist Brandon Jiao, will discuss the approach for designing links from Ultrascale FPGAs with 32Gbps capable transceivers, routed from daughter-cards, through connectors and a backplane. Brandon will explore the tools and practical methods needed to insure the performance of the link design, check for compliance to 802.3bj specs, and discuss how Xilinx supports their customers for design success. At the end of the webcast, you will understand the important aspects of 100G link design, what design workspaces are available to help you leap into 100G designs, and where to find further design support.
WHO SHOULD ATTEND
Signal integrity engineers
Brandon Jiao, Transceiver Technical Marketing Engineer, Xilinx Inc.
Enroll to view the October 27, 2016 live broadcast